FreeBSD Security Advisory (FreeBSD-SA-06:14.fpu.asc)

Published: 2008-09-04 18:41:11
CVE Author: NIST National Vulnerability Database

CVSS Base Vector:

Technical Details:
The floating-point unit (FPU) of i386 and amd64 processors is derived from the original 8087 floating-point co-processor. As a result, the FPU contains the same debugging registers FOP, FIP, and FDP which store the opcode, instruction address, and data address of the instruction most recently executed by the FPU. On processors implementing the SSE instruction set, a new pair of instructions fxsave/fxrstor replaces the earlier fsave/frstor pair used for saving and restoring the FPU state. These new instructions also save and restore the contents of the additional registers used by SSE instructions. On 7th generation and 8th generation processors manufactured by AMD, including the AMD Athlon, Duron, Athlon MP, Athlon XP, Athlon64, Athlon64 FX, Opteron, Turion, and Sempron, the fxsave and fxrstor instructions do not save and restore the FOP, FIP, and FDP registers unless the exception summary bit (ES) in the x87 status word is set to 1, indicating that an unmasked x87 exception has occurred. This behaviour is consistent with documentation provided by AMD, but is different from processors from other vendors, which save and restore the FOP, FIP, and FDP registers regardless of the value of the ES bit. As a result of this discrepancy remaining unnoticed until now, the FreeBSD kernel does not restore the contents of the FOP, FIP, and FDP registers between context switches.

Upgrade your system to the appropriate stable release or security branch dated after the correction date

The remote host is missing an update to the system as announced in the referenced advisory FreeBSD-SA-06:14.fpu.asc

Detection Type:
Linux Distribution Package

Solution Type:
Vendor Patch

NIST (National Institute of Standards and Technology) NVD (National Vulnerability Database)

SecurityFocus Bugtraq ID:

CVSS Score
FreeBSD Local Security Checks

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