CVE-2019-0151
Published: 2019-11-14
Last Modified: 2019-11-27
CVE Author: NIST National Vulnerability Database
CVE Assigner: secure@intel.com
Insufficient memory protection in Intel(R) TXT for certain Intel(R) Core Processors and Intel(R) Xeon(R) Processors may allow a privileged user to potentially enable escalation of privilege via local access.
| Severity | High |
| Base Score | 7.2/10 |
| Exploit Score | 3.9/10 |
| Access Vector | Local |
| Access Complexity | Low |
| Authentication | None |
| Impact Score | 10/10 |
| Confidentiality Impact | Complete |
| Availability Impact | Complete |
| Integrity Impact | Complete |
| Vector String | AV:L/AC:L/Au:N/C:C/I:C/A:C |
| Severity | Medium |
| Base Score | 6.7/10 |
| Exploit Score | 0.8/10 |
| Access Vector | Local |
| Access Complexity | Low |
| Privileges Required | High |
| Impact Score | 5.9/10 |
| Confidentiality Impact | High |
| Availability Impact | High |
| Integrity Impact | High |
| Scope | Unchanged |
| User Interaction | None |
| Vector String | CVSS:3.1/AV:L/AC:L/PR:H/UI:N/S:U/C:H/I:H/A:H |
| CPE | Vulnerable | Start | Excluding |
|---|
https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00240.html
https://support.hpe.com/hpsc/doc/public/display?docLocale=en_US&docId=emr_na-hpesbhf0397
https://support.f5.com/csp/article/K34425791?utm_source=f5support&utm_medium=RSS
https://cert-portal.siemens.com/productcert/pdf/ssa-398519.pdf
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